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Joranalogue 8HP
LOGIC TRIGGER GATE UTILITY

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Dual analogue window comparator with logic section. Each side detects whether the input voltage sits inside a shift/size-defined window. Extracts gates and pulses from any CV or audio signal.

Patch Ideas · 7

★ Complex rhythm generator
LFO → left IN · dial SHIFT/SIZE per side to carve gate patterns at different points of the LFO cycle · AND/OR/XOR/FF outputs drive envelopes or drums · modulate SHIFT/SIZE CV to evolve the rhythm
▸ Show diagram
Patch diagramPatch diagram with 5 modules and 4 connections. Modules: Compare 2, LFO, Envelope 1, Drum, Envelope 2. Signals: 1 cv, 3 gate.Compare 2LFOEnvelope 1DrumEnvelope 2CH 1 SHIFT: tasteCH 1 SIZE: narrowCH 2 SHIFT: different offsetCH 2 SIZE: mediumINcvANDgateXORgateFFgateOutcvTriggateTriggateGategate121. normalises to right2. half-rate latchcvgate
★ Audio frequency multiplier
Triangle VCO → left IN (normalised to right) · both comparators on · XOR output as audio · SHIFT/SIZE sweep output between fundamental, +1 and +2 octave with complex pulse waveforms · use FF for −1/0/+1 octave jumps
▸ Show diagram
Patch diagramPatch diagram with 3 modules and 3 connections. Modules: Compare 2, VCO, Mixer. Signals: 3 audio.Compare 2VCOMixerCH 1 SHIFT: noonCH 1 SIZE: narrowCH 2 SHIFT: offsetCH 2 SIZE: narrowINaudioXORaudioFFaudioTriaudioInaudio121. pulse, octave-shifting with SIZE2. sub-octave variantaudio
Digital ring modulator
VCO A → left IN · VCO B → right IN · XOR output as audio · detune sources for ring mod timbres · modulate SHIFT/SIZE for PWM-style bite
▸ Show diagram
Patch diagramPatch diagram with 7 modules and 4 connections. Signals: 3 audio, 1 cv.Compare 2VCO ACH 1VCO BCH 2LFOVCACH 1 SHIFT: 0VCH 1 SIZE: narrowCH 2 SHIFT: 0VCH 2 SIZE: narrowXORaudioOutaudioINaudioSIZE CVcvOutaudioINaudioOutcvInaudio11. PWM on ring modaudiocv
Dynamic depth VCO sync
Slave VCO → CH 1 IN · sync source VCO → CH 2 IN · XOR → slave's FM input (depth knob on VCO or VCA) · depth and Compare 2 settings set sync timbre · VCA in FM path for voltage-controlled sync amount
▸ Show diagram
Patch diagramPatch diagram with 7 modules and 5 connections. Signals: 2 audio, 3 cv.Compare 2Slave VCOCH 1Sync VCOCH 2VCAEnvelopeCH 1 SHIFT/SIZE: narrow window near 0VCH 2 SHIFT/SIZE: sameXORcvFMcvOutaudioINaudioOutaudioINaudioIncvCVcvOutcvOutcvaudiocv
Voltage-controlled swing
Clock → left IN · LFO → SHIFT CV · fixed narrow SIZE · slow LFO shifts detection threshold, producing a clock whose edges shift earlier/later — swing that can be CV'd
▸ Show diagram
Patch diagramPatch diagram with 4 modules and 3 connections. Modules: Compare 2, Clock, LFO, Drum. Signals: 1 cv, 1 gate, 1 clock.Compare 2ClockLFODrumCH 1 SHIFT: 0VCH 1 SIZE: narrowINclkSHIFT CVcvOUTgateOutclkOutcvTriggate11. swing depthcvgateclock
Set/reset latch
SHIFT min · SIZE ~3 o'clock · OUT → SIZE CV (self-feedback) · rising edge on SHIFT CV sets the latch high · rising edge on IN resets it low · LED reports latch state
▸ Show diagram
Patch diagramPatch diagram with 3 modules and 3 connections. Modules: Compare 2, Set Gate, Reset Gate. Signals: 1 cv, 2 gate.Compare 2Set GateReset GateCH 1 SHIFT: minCH 1 SIZE: ~3 o'clockSIZE CVcvSHIFT CVgateINgateOUTcvOutgateOutgate11. latch feedbackcvgate
Six-input logic array
SHIFT max · SIZE noon (window +2.5V to +7.5V) · any +5V gate on IN, SHIFT CV or SIZE CV activates that comparator · AND/OR/XOR/FF combine gate streams from up to six sources
▸ Show diagram
Patch diagramPatch diagram with 9 modules and 6 connections. Signals: 6 gate.Compare 2Gate ACH 1Gate BGate CGate DCH 2DrumEnvelopeCH 1 SHIFT: maxCH 1 SIZE: noonCH 2 SHIFT: maxCH 2 SIZE: noonANDgateXORgateOutgateINgateSHIFT CVgateSIZE CVgateOutgateOutgateOutgateINgateTriggateTriggategate

Behaviors

Window detection IN between SHIFT ± SIZE/2

OUT goes high while the input voltage sits between the two window edges. LED shows blue below window, red above, white inside.

Negative window SIZE knob + CV sum goes below 0

Comparator output stays low permanently. LED extinguishes rather than turning white. Useful for CV-gated muting of a gate stream.

Left-to-right normalisation right jacks unpatched

IN, SHIFT CV and SIZE CV all normalise from the left comparator to the right. Lets a single signal or CV drive both windows simultaneously.

XOR flip-flop rising edge on XOR

Every rising XOR edge toggles the FF output. Divides XOR rate by two; transitions OUT-based pulse train into sub-octave or latched gate.

Set/reset latch feedback: OUT → SIZE CV

Per comparator, patching OUT back to SIZE CV with SHIFT min and SIZE ~3 o'clock turns it into an SR latch. SHIFT CV rising edge sets, IN rising edge resets.

Audio-rate PWM triangle/saw into IN

At audio rate the comparator emits a pulse wave. SHIFT moves phase/width, SIZE sets duty. Output can jump between fundamental and +1 octave as the window clips both halves.

Logic input thresholds gate signals into CV inputs

With SHIFT max and SIZE noon, window is +2.5V to +7.5V. All five jacks (IN, SHIFT CV, SIZE CV × 2) then accept standard +5V gates, yielding a 6-input logic array.

Controls

CH 1 & 2 SHIFT Offsets the detection window's centre voltage.
−5V to +5V · 0V at centre
CH 1 & 2 SIZE Sets distance between the window's lower and upper edges.
~few mV to 10V · negative after adding CV disables the comparator

I/O

IN · 3

  • SHIFT CV bipolar CV CV
    Modulates window centre. Sums with the SHIFT knob. Processes bipolar CV.
    NORM → right comparator SHIFT CV (left → right)
  • SIZE CV bipolar CV CV
    Modulates window size. Sums with the SIZE knob. Negative sum disables comparator output.
    NORM → right comparator SIZE CV (left → right)
  • IN any CV/audio CV
    Analogue signal to compare. Accepts CV or audio.
    NORM → right comparator IN (left → right)

OUT · 6

  • OUT 0V / +5V gate GATE
    Main gate: high when the input sits inside the detection window.
  • NOT 0V / +5V gate GATE
    Inverted main gate. High whenever OUT is low.
  • AND 0V / +5V gate GATE
    Logic AND of both comparators. High only when both are inside their windows.
  • OR 0V / +5V gate GATE
    Logic OR of both comparators. High when either or both are inside their windows.
  • XOR 0V / +5V gate GATE
    Logic XOR of both comparators. High only when exactly one is inside its window.
  • FF 0V / +5V gate GATE
    T flip-flop. Toggles state on every rising edge of XOR.